#! /bin/sh

warnings='-Wall -Wcast-qual -Woverloaded-virtual'
warnings=
warnings='-Wall -std=c++11 -pedantic -g'

srcfiles=`echo *.cc`
case "${srcfiles}" in
'*.cc')	echo "${0}: there are no C++ source files (.cc) here" >&2
	exit 1 ;;
esac

hdrfiles=`echo *.h`
case "${hdrfiles}" in
'*.h')	hdrfiles= ;;
esac

mains=`egrep -l '^(.*[ 	])?main[ 	]*\(' ${srcfiles} | sed 's/\.cc$//'`
mains=`echo ${mains}`

objects=`(
		for i in ${mains}; do echo ${i}.cc; done
		for i in ${srcfiles}; do echo ${i}; done
	) | sort | uniq -u | sed 's/\.cc$/.o/'`
objects=`echo ${objects}`
libs=
includes=

(
echo "CXXFLAGS = ${warnings} ${includes}
# Make uses the C compiler (CC) to link object (.o) files into an executable.
# So set the C compiler to be the C++ compiler (CXX) to avoid problems:
CC      = \$(CXX)
LDFLAGS  = \$(CXXFLAGS)
LDLIBS	= ${libs}
PROGS	= ${mains}
OBJECTS	= ${objects}
SHELL	= /bin/sh"

echo '
#
# Targets to make start here. Each target is followed by a list of
# other targets it depends upon. So "all" depends on making each of
# the executables in the list of PROGS first.
#
# "all" is a pseudo-target - just there to cause make to make its
# dependencies. There is nothing more to do after them - no command.
#
all: $(PROGS)'

for i in ${mains}
do
	echo "
${i}: ${i}.o \$(OBJECTS)
	\$(CXX) \$(CXXFLAGS) -o ${i} ${i}.o \$(OBJECTS) \$(LIBS)"
done

echo '
#
# Here are some standard targets - clean, Makefile, and depend.
# Commands to make them start with a TAB character (NOT SPACES!). If
# the command starts with a "-", then make ignores errors. If it
# does not start with a "-" then make will stop at errors.
#
clean:
	-/bin/rm -f $(PROGS) *.o Makefile.bak

Makefile:
	'"`dirname ${0}`"'/makemake

depend:
	'"`dirname ${0}`"'/makedepend $(CXXFLAGS) *.cc
'
) >Makefile

make depend